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DSP芯片TMS320LF2401A 解密
分类：热门芯片解密型号 | 发布:admin | 查看: | 发表时间:2009-11-30
TMS320LF2401A DSP芯片解密是TI公司典型DSP系列芯片解密型号，也是橙盒科技在IC解密技术研究领域的主要研究重点之一。作为目前国内最权威的专业芯片解密技术研究机构，橙盒科技专业提供各类疑难IC芯片解密、DSP芯片解密、CPLD芯片解密、FPGA芯片解密等技术服务，特别是针对各种高难度IC解密，我们还可以提供解密方案开发。
这里，我们仅提供对TMS320LF2401A芯片的主要功能特征介绍，供客户及解密工程师参考借鉴，有TMS320LF2401A解密等DSP芯片解密需求者欢迎与橙盒科技联系咨询更多合作详情，
芯片解密咨询电话：0755-82221641，82175584 , 24小时服务电话18927468661
咨询QQ： 994589503 , 1357273089
TMS320LF2401 FEATURES
High-Performance Static CMOS Technology
- 25-ns Instruction Cycle Time (40 MHz)
- 40-MIPS Performance
- Low-Power 3.3-V Design
Based on TMS320C2xx DSP CPU Core
- Code-Compatible With 240x and F243/F241/C242
- Instruction Set Compatible With F240/C240
On-Chip Memory
- Up to 8K Words x 16 Bits of Flash EEPROM (2 Sectors) (LF2401A)
- 8K Words x 16 Bits of ROM (LC2401A)
- Programmable ode-Security?Feature for the On-Chip Flash/ROM
- Up to 1K Words x 16 Bits of Data/Program RAM
- 544 Words of Dual-Access RAM
- Up to 512 Words of Single-Access RAM
Boot ROM
- SCI Bootloader
Event-Manager (EV) Module (EVA), Which Includes:
- Two 16-Bit General-Purpose Timers
- Seven 16-Bit Pulse-Width Modulation(PWM) Channels Which Enable:
- Three-Phase Inverter Control
- Center- or Edge-Alignment of PWM Channels
- Emergency PWM Channel Shutdown With External PDPINTA Pin
- Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
- One Capture Unit for Time-Stamping of External Events
- Input Qualifier for Select Pins
- Synchronized A-to-D Conversion
- Designed for AC Induction, BLDC,Switched Reluctance, and Stepper Motor Control
Small Foot-Print (7 mm ?7 mm) Ideally Suited for Space-Constrained Applications
Watchdog (WD) Timer Module
10-Bit Analog-to-Digital Converter (ADC)
- 5 Multiplexed Input Channels
- 500 ns Minimum Conversion Time
- Selectable Twin 8-State Sequencers Triggered by Event Manager
Serial Communications Interface (SCI)
Phase-Locked-Loop (PLL)-Based Clock Generation
Up to 13 Individually Programmable,Multiplexed General-Purpose Input/Output(GPIO) Pins
User-Selectable Dual External Interrupts(XINT1 and XINT2)
Power Management:
- Three Power-Down Modes
- Ability to Power Down Each Peripheral Independently
Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1?(JTAG)
Development Tools Include:
- Texas Instruments (TI) ANSI C Compiler,Assembler/Linker, and Code Composer Studio. Debugger
- Evaluation Modules
- Scan-Based Self-Emulation (XDS510.)
- Broad Third-Party Digital Motor Control Support
32-Pin VF Low-Profile Quad Flatpack (LQFP)
Temperature Range: - 40℃ to 85 ℃
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